1. Field of the Invention
Embodiments of the present invention generally relate to the fabrication of integrated circuits. More particularly, embodiments of the present invention relate to an apparatus and method for electron beam treatment of a substrate.
2. Description of the Related Art
Integrated circuit geometries have dramatically decreased in size since such devices were first introduced several decades ago. Since then, integrated circuits have generally followed the two year/half-size rule (often called Moore's Law), which means that the number of devices on a chip doubles every two years. Today's fabrication facilities are routinely producing devices having 0.13 μm and even 0.1 μm feature sizes, and tomorrow's facilities soon will be producing devices having even smaller feature sizes.
The continued reduction in device geometries has generated a demand for films having lower dielectric constant (k) values because the capacitive coupling between adjacent metal lines must be reduced to further reduce the size of devices on integrated circuits. In particular, insulators having low dielectric constants, less than about 4.0, are desirable. Examples of insulators having low dielectric constants include spin-on glass, fluorine-doped silicon glass (FSG), and polytetrafluoroethylene (PTFE), which are all commercially available.
More recently, organosilicon films having k values less than about 3.5 have been developed. One method that has been used to develop low dielectric constant organosilicon films has been to deposit the films from a gas mixture comprising one or more organosilicon compounds and then post-treat the deposited films to remove volatile or thermally labile species, such as organic groups, from the deposited films. The removal of the volatile or thermally labile species from the deposited films creates voids in the films, which lowers the dielectric constant of the films, as air has a dielectric constant of approximately 1.
Electron beam treatment has been successfully used to post-treat the deposited films and create voids in the films, while also improving the mechanical properties of the films. However, current electron beam chamber designs suffer from several major drawbacks. First, current electron beam chamber designs can have negative side effects on a substrate, such as damage or destruction of semiconductor devices on a substrate. For example, high gate oxide leakage and voltage threshold (VT) shift have been observed after electron beam treatment. It is believed that the electron beam treatment damages substrates by causing an excess negative charge build up on the substrates from the electrons bombarding the substrate. The excess negative charge build up during device manufacturing can create charge currents that form undesirable current paths in areas of the substrate that are normally insulating, and leakage current through the newly created current paths during operation of the devices can destroy the devices on the substrate. Second, current electron beam chamber designs have contributed to heavy metal contamination of substrates. Third, poor within substrate shrinkage due to a lack of temperature uniformity across the substrate surface has been exhibited. Shrinkage uniformity is an indication of film properties such as hardness.
Thus there remains a need for an improved apparatus and method of electron beam treatment of a deposited layer on a substrate.